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Guide to Altera Bare Die
Products
What are the Products?
There are 2 types of bare die products
All are empty bare die
waiting to be programmed with digital functions and available either
un-bumped for wirebonding or bumped for Flip-Chip.
See link for products
http://www.altera.com/products/devices/dev-index.jsp
There are 3 main differences between the FPGA and CPLD
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Size - The CPLD is a lot
smaller than FPGA it has capacity to store
much less information
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Volatility - Once the bare
die have been programmed the CPLD is Non-Volatile, it will remember the
programming when the power is switched off. The FPGA is Volatile - It
will lose it's programming when the power is switched off and requires a
"Re-boot" when the power is turned back on (Often a CPLD is used to
store the boot code for the FPGA)
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Cost - Mainly because of die
size the FPGA is much more expensive than the CPLD.
What can be programmed
into an FPGA?
Rule #1 Anything that uses digital functions!!!
Rule #2 FPGA devices CANNOT handle analog functions although they can
act as an interface from another analog die.
Microprocessors /
Microcontrollers
Microprocessors and Microcontrollers can be included in the bare die.
There are 2 ways of developing a microprocessor or microcontroller on
the FPGA.
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Soft processor / controller
- The coding for the Controller/Processor is received when the FPGA
boots up, the FPGA then configures part of itself to behave like a
controller/processor.
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Hard wired
processor/controller - Some FPGAs have a common processor already fabbed
on-board the die, this allows the user to add the rest of their
programming to the die around the processor.
A good example of this is
the Stratix FPGA which can also come with an ARM Processor already
fabbed on-board the die.
If a designer is not sure whether to choose a hardwired
processor/controller or soft processor/controller please
contact us, there are important
trade-offs in terms of die size, power consumption, costs etc.
There are also standard soft and hard wired processors that can be
chosen by the designer and plugged-in straight away into his/her design.
The list of available processor/controller products can be found below
along with other standard "plug-ins" or the engineers can design their
customer processors instead.
http://www.altera.com/products/ip/processors/ipm-index.jsp
Memory
FPGAs come with a small area of memory on the die ready for use, please
note that this memory is Volatile and is only designed for use when the
die is running. FPGAs should not be used for memory only as they are not
cost effective. The size of memory built into the die can vary so can
effect an engineers choice of die to begin the design.
External memory interfaces for non-volatile flash, SDRAM and other
memory types can also be built into the die.
PLLs - Phase Locked Loops
Multiple PLLs can be designed into the die to control clock management,
the number of PLLs that can be built into the die will depend on the die
size.
DSP Blocks - Digital Signal Processing Blocks
Used for Filtering, Transforms, Modulation, Compression, Resizing,
Chip-Rate Processing ,Equalization, Digital IF, Signal Data Rate (SDR)
Multiple DSP blocks can be added to the FPGA, the number of DSPs will
depend on the total size of the FPGA die chosen.
Like with the Processors/Controllers DSP standard products can be
"plugged-in" from the list below or the engineers can design their
customer DSP instead.
http://www.altera.com/products/ip/dsp/ipm-index.jsp
Interfaces
Any interfacing can be designed around the other components.
Like with the Processors/Controllers standard interface functions can
also be "plugged-in" from the list below or the engineers can design
custom interfacing instead
http://www.altera.com/products/ip/iup/ipm-index.jsp
What can be programmed
into a CPLD?
Logic + Interfacing
The CPLD is Non-Volatile, it does not lose it's memory when power is
switched off.
Older CPLDs use EPROM memory, today's CPLDs use Flash Memory.
What is a CPLD used for?
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Boot Up
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Control the configuration or
initialisation of volatile devices.
For example, the CPLD could boot-up an Altera FPGA or Volatile Custom
ASIC
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Can also manage the correct
power-up sequencing for other devices on the board.
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Interfacing
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Can Translate bus protocols
and voltages between incompatible devices
at the lowest possible cost, E.g. Serial to Parallel data conversion
Allows I/O (Input Output) management - Can de-code I/Os or can increase
I/O capability on a standard device by copying the device and using the
extra I/Os on-board the die.
What are the benefits of
using these products in die form?
Please click here to
see our flyer. (pdf)
We can offer these products as Hi-Rel die, for Aerospace & Military.
For details about packaging and specific customer requirements such as SEU (Single Event Upset) protection etc,
contact us so we can explain the
solution further.
What is the design flow
to build these die?
FPGA & CPLD - 10 steps
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First the customer needs to
decide the die size they need.
They need to pick a die which has enough logic blocks, memory bits, PLLs
etc to suit their needs. It is important to pick the right size die to
control the cost and power consumption. For CPLD users primary needs are
logic blocks & memory bits.
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Once the die is chosen they
need to review the available plug-ins Altera offer,
http://www.altera.com/products/ip/ipm-index.html
they can use any combination of custom and "plug-in" design they like.
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They need to receive the
design software - The most popular software is Quartus see link below
http://www.altera.com/support/software/download/altera_design/quartus_we/dnl-quartus_we.jsp
This can be supplied by us or the customer can download on-line.
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The customer may wish to
purchase a Development Kit, this includes a PCB circuit board with the
packaged version of their FPGA on-board that can be connected to a PC
and programmed with Quartus. The kits include software, reference
designs, cables, and programming hardware.
http://www.altera.com/products/devkits/kit-dev_platforms.jsp -
Please contact us to receive your kit
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When their design is
complete, they can use the software to send us their finished design.
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We then send prototype die
for them to test in the application (if necessary we can also send
packaged product for initial breadboarding)
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If corrections need to be
made, the customer amends the software and sends us the new version.
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We supply more die based on
the revised software.
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When the customer is happy
with product performance we then supply the die for production.
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If the customer wants to
save more money, reduce the die size and power consumption they should
then consider HardCopy see link below.
http://www.altera.com/products/devices/hardcopyii/hr2-index.jsp
What are the typical
applications/markets for Altera die products?
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